Work type:

Engineering, R&D and management
Work Experience:

7+ years of experience
Responsibilities:

Lead end-to-end design team for high-performance, low-power embedded SRAMs on advanced technologies
Memory compiler development, characterization, and verification
Requirements:

BS/MS in Electrical or Computer Engineering or equivalent with 7+ years of experience
Skill in bitcell stability analysis
Good understanding of high-performance and low-power circuit designs with Fin FET technologies
Proven experience as the designated responsible individual for a memory design, leading a small team of designers
Good to have:

Proficiency in scripting languages: Python, Tcl
Experience in

Experience in Synopsys custom compiler
Personality:

Independent, self-motivated, well-structured, creative
Good communication skills in English
Why join Synthara:

Be at the forefront of cutting-edge, low-power semiconductor development
Work in a collaborative, dynamic, and flexible startup culture
Great opportunities for professional growth and career advancement

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